[PATCH v2 03/16] RISC-V: add dedicated vector arithmetic .insn forms

Project / Subsystem

binutils / risc-v

Date

2026-05-15

Proposer

Jan Beulich <jbeulich@suse.com>

Source type

public_inbox

Consensus

Proposed

Sentiment

/10

Technical tradeoffs

  • Potential ambiguity with future OP_VE instructions if naming conventions are not carefully considered.
  • The current parsing logic may not support both signed and unsigned immediates for OPIVI instructions.
  • Adding forms with immediates for V*UNARY* instructions could increase code complexity.

All attributes

project
binutils
subsystem
risc-v
patch_id
discussion_id
81972842-e7b8-460b-aea7-3e8511c3f26b@suse.com
source_type
public_inbox
title
[PATCH v2 03/16] RISC-V: add dedicated vector arithmetic .insn forms
headline
RISC-V: Add dedicated vector arithmetic .insn forms
tldr
Adds more dedicated .insn forms for RISC-V vector arithmetic instructions to simplify their use in assembly.
proposer
Jan Beulich <jbeulich@suse.com>
consensus
Proposed
outcome
proposed
sentiment_score
technical_tradeoffs
  • Potential ambiguity with future OP_VE instructions if naming conventions are not carefully considered.
  • The current parsing logic may not support both signed and unsigned immediates for OPIVI instructions.
  • Adding forms with immediates for V*UNARY* instructions could increase code complexity.
series_id
binutils:risc-v: add dedicated vector arithmetic .insn forms
series_role
reply
series_parts
[]
tags
  • risc-v
  • assembler
  • vectorization
  • .insn
bugzilla_url
date
2026-05-15T00:00:00.000Z

[PATCH v2 03/16] RISC-V: add dedicated vector arithmetic .insn forms

This patch adds dedicated .insn forms for RISC-V vector arithmetic instructions, aiming to make assembly code easier to write and read. The patch introduces new forms for the OP_V opcode. The author is seeking feedback on naming conventions for future OP_VE instructions and on the possibility of adding forms with immediates for encoding VUNARY instructions.