Re: [PATCH] RISC-V: Add experimental support for Zvabd extension
Project / Subsystem
binutils / risc-v
Date
2026-05-28
Proposer
Jeffrey Law <jeffrey.law@oss.qualcomm.com>
Source type
public_inbox
Consensus
Proposed
Sentiment
—/10
All attributes
- project
- binutils
- subsystem
- risc-v
- patch_id
- —
- discussion_id
- 449a3875-1e31-4fb0-9d1f-f54e63d99ef6@oss.qualcomm.com
- source_type
- public_inbox
- title
- Re: [PATCH] RISC-V: Add experimental support for Zvabd extension
- headline
- RISC-V: Add experimental support for Zvabd extension
- tldr
- Jiawei will update the binutils patch for the Zvabd extension, which is now in Freeze, after renaming the mnemonic.
- proposer
- Jeffrey Law <jeffrey.law@oss.qualcomm.com>
- consensus
- Proposed
- outcome
- proposed
- sentiment_score
- —
- technical_tradeoffs
- []
- series_id
- —
- series_role
- standalone
- series_parts
- []
- tags
-
- • risc-v
- • Zvabd
- • extension
- • binutils
- • assembler
- bugzilla_url
- —
- date
- 2026-05-28T00:00:00.000Z
Re: [PATCH] RISC-V: Add experimental support for Zvabd extension
Jiawei is picking up Zhongyao’s work to add experimental support for the RISC-V Zvabd extension in binutils. The Zvabd extension specification is now in Freeze, and the only remaining change is a mnemonic rename. Jiawei will refresh the binutils patch and update it against the current specification, including opcodes, gas changes, and tests.