RE: [PATCH v1 2/2] Support x86 ACE ISA
Project / Subsystem
binutils / binutils
Date
2026-07-01
Proposer
Jiang, Haochen <haochen.jiang@intel.com>
Source type
public_inbox
Consensus
Proposed
Sentiment
—/10
Technical tradeoffs
- • Choosing a naming convention that is both officially consistent and clear to users.
- • Aligning with existing naming patterns in binutils for processor extensions.
All attributes
- project
- binutils
- subsystem
- binutils
- patch_id
- —
- discussion_id
- IA4PR11MB90092AB3598336D7F5DC47E3ECF62@IA4PR11MB9009.namprd11.prod.outlook.com
- source_type
- public_inbox
- title
- RE: [PATCH v1 2/2] Support x86 ACE ISA
- headline
- Support x86 ACE ISA
- tldr
- Discusses naming convention for the x86 ACE ISA in binutils.
- proposer
- Jiang, Haochen <haochen.jiang@intel.com>
- consensus
- Proposed
- outcome
- proposed
- sentiment_score
- —
- technical_tradeoffs
-
- • Choosing a naming convention that is both officially consistent and clear to users.
- • Aligning with existing naming patterns in binutils for processor extensions.
- series_id
- binutils:support x86 ace isa
- series_role
- reply
- series_parts
- []
- tags
-
- • x86
- • ACE
- • ISA
- • binutils
- • assembler
- bugzilla_url
- —
- date
- 2026-07-01T00:00:00.000Z
RE: [PATCH v1 2/2] Support x86 ACE ISA
This thread discusses the appropriate naming for the x86 ACE ISA within binutils. The core of the discussion is whether to use ‘ACE’ or ‘ACEV1’ as the identifier, considering that the official documentation refers to it as ‘ACEv1’. The proposer indicates they are amenable to either ‘ace_v1’ or ‘acev1’ for binutils.