Re: [PATCH v2] RISC-V: Add new relocation types for global array accesses
Project / Subsystem
binutils / risc-v
Date
2026-07-23
Proposer
Jiawei <jiawei@iscas.ac.cn>
Source type
public_inbox
Consensus
Proposed
Sentiment
—/10
Technical tradeoffs
- • Optimization vs. Correctness: Balancing the efficiency gains from new relocation types against the risk of incorrect code generation due to relaxation issues.
- • Generic vs. Specific Handling: Deciding whether a general relaxation rule can accommodate new relocation types or if specific handling is required.
- • ABI Stability: Ensuring that changes to relocation handling do not break the established ABI for RISC-V.
All attributes
- project
- binutils
- subsystem
- risc-v
- patch_id
- —
- discussion_id
- 5bb12fd3-45f9-4d31-bbe7-b94beebd1c7e@iscas.ac.cn
- source_type
- public_inbox
- title
- Re: [PATCH v2] RISC-V: Add new relocation types for global array accesses
- headline
- RISC-V: Add new relocation types for global array accesses
- tldr
- Reviewer Jiawei points out that R_RISCV_BASE_IDX_ADD relocation handling is too broad and may conflict with existing relaxation rules.
- proposer
- Jiawei <jiawei@iscas.ac.cn>
- consensus
- Proposed
- outcome
- needs_revision
- sentiment_score
- —
- technical_tradeoffs
-
- • Optimization vs. Correctness: Balancing the efficiency gains from new relocation types against the risk of incorrect code generation due to relaxation issues.
- • Generic vs. Specific Handling: Deciding whether a general relaxation rule can accommodate new relocation types or if specific handling is required.
- • ABI Stability: Ensuring that changes to relocation handling do not break the established ABI for RISC-V.
- series_id
- —
- series_role
- standalone
- series_parts
- []
- tags
-
- • binutils
- • RISC-V
- • linker
- • relocation
- • relaxation
- bugzilla_url
- —
- date
- 2026-07-23T00:00:00.000Z
Re: [PATCH v2] RISC-V: Add new relocation types for global array accesses
Jiawei reviews a patch proposing new RISC-V relocation types for global array accesses and points out a potential issue with R_RISCV_BASE_IDX_ADD. The reviewer notes that this relocation type’s handling of rewriting the rs2 register to use gp as the base is too permissive and may conflict with existing relaxation rules, specifically _bfd_riscv_relax_lui. The issue arises when the symbol’s displacement from gp is not adequately limited by the relaxation mechanism.