[PATCH v4 03/12] RISC-V: replace INSN_V_EEW64

Project / Subsystem

binutils / risc-v

Date

2026-07-24

Proposer

Jan Beulich <jbeulich@suse.com>

Source type

public_inbox

Consensus

Proposed

Sentiment

/10

Technical tradeoffs

  • Improves code clarity and correctness by using more specific instruction classes.
  • Replaces a generic flag with a more specialized enum, potentially simplifying logic elsewhere.

All attributes

project
binutils
subsystem
risc-v
patch_id
discussion_id
36f87cee-df61-46de-8919-83ff26fda06f@suse.com
source_type
public_inbox
title
[PATCH v4 03/12] RISC-V: replace INSN_V_EEW64
headline
RISC-V: replace INSN_V_EEW64
tldr
Introduce INSN_CLASS_ZVE64X for RISC-V vector instructions.
proposer
Jan Beulich <jbeulich@suse.com>
consensus
Proposed
outcome
proposed
sentiment_score
technical_tradeoffs
  • Improves code clarity and correctness by using more specific instruction classes.
  • Replaces a generic flag with a more specialized enum, potentially simplifying logic elsewhere.
series_id
binutils:risc-v: replace insn_v_eew64
series_role
reply
series_parts
[]
tags
  • binutils
  • risc-v
  • vector
  • extension
  • assembler
bugzilla_url
date
2026-07-24T00:00:00.000Z

[PATCH v4 03/12] RISC-V: replace INSN_V_EEW64

This patch replaces the INSN_V_EEW64 flag with the more specific INSN_CLASS_ZVE64X in the RISC-V assembler and BFD library. This change improves clarity by properly categorizing instructions that support the ZVE64X extension, making diagnostics and subset checks more accurate, especially concerning the interaction between ZVE32X and ZVE64X.