RE: [PATCH] x86: prune redundant x64 from RMPREAD

Project / Subsystem

binutils / x86

Date

2026-09-05

Proposer

"Shenoy, Rohan Radhesh" <RohanRadhesh.Shenoy@amd.com>

Source type

public_inbox

Consensus

Proposed

Sentiment

—/10

Technical tradeoffs

  • • Explicit vs. implicit operand specification for RMPREAD.

All attributes

project
binutils
subsystem
x86
patch_id
—
discussion_id
PH0PR12MB81496A17107CB187927F2796EEB42@PH0PR12MB8149.namprd12.prod.outlook.com
source_type
public_inbox
title
RE: [PATCH] x86: prune redundant x64 from RMPREAD
headline
x86: prune redundant x64 from RMPREAD
tldr
Rohan Shenoy questions the need for explicit operands in RMPREAD, suggesting an operand-less form is implied by AMD's APM.
proposer
"Shenoy, Rohan Radhesh" <RohanRadhesh.Shenoy@amd.com>
consensus
Proposed
outcome
proposed
sentiment_score
—
technical_tradeoffs
  • • Explicit vs. implicit operand specification for RMPREAD.
series_id
—
series_role
standalone
series_parts
[]
tags
  • • x86
  • • assembly
  • • instruction syntax
  • • amd
bugzilla_url
—
date
2026-09-05T00:00:00.000Z

RE: [PATCH] x86: prune redundant x64 from RMPREAD

Rohan Shenoy questions why RMPREAD, unlike other RMP instructions, requires explicit operands. He believes an operand-less form is implied by the latest AMD APM, which suggests implicit use of RAX and RCX registers for RMPREAD.