AArch64: Optimize ADD relocations that resolve to zero

Project / Subsystem

binutils / aarch64

Date

2026-09-08

Proposer

Alice Carlotti <alice.carlotti@arm.com>

Source type

public_inbox

Consensus

Proposed

Sentiment

—/10

Technical tradeoffs

  • • Improves code density and potentially performance by replacing redundant ADD instructions.
  • • Adds complexity to the relocation handling logic.
  • • Ensures compatibility with `--no-relax` option.

All attributes

project
binutils
subsystem
aarch64
patch_id
—
discussion_id
68718532-7533-55c0-3646-08fdd29abafa@e124511.cambridge.arm.com
source_type
public_inbox
title
AArch64: Optimize ADD relocations that resolve to zero
headline
AArch64: Optimize zero-resolving ADD relocations
tldr
AArch64 ADD relocations that resolve to zero are now optimized to MOV or NOP instructions.
proposer
Alice Carlotti <alice.carlotti@arm.com>
consensus
Proposed
outcome
needs_revision
sentiment_score
—
technical_tradeoffs
  • • Improves code density and potentially performance by replacing redundant ADD instructions.
  • • Adds complexity to the relocation handling logic.
  • • Ensures compatibility with `--no-relax` option.
series_id
binutils:aarch64: optimize add relocations that resolve to zero
series_role
reply
series_parts
[]
tags
  • • AArch64
  • • optimization
  • • linker
  • • relocations
bugzilla_url
—
date
2026-09-08T00:00:00.000Z

AArch64: Optimize ADD relocations that resolve to zero

This patch introduces an optimization for AArch64 AArch64 ADD instructions where the immediate value becomes zero after relocation. According to the ARM architecture specification, such instructions can be replaced with a MOV instruction (for different source and destination registers) or a NOP (for the same source and destination register). This optimization is applied conditionally, respecting the --no-relax linker option, and ensures that 32-bit operations correctly clear the upper bits.