[PATCH] AArch64: Optimize zero-valued ADRP relocations for undefined weak symbols
Project / Subsystem
binutils / aarch64
Date
2026-09-09
Proposer
Sivan Shani <sivan.shani@arm.com>
Source type
public_inbox
Consensus
Proposed
Sentiment
—/10
Technical tradeoffs
- • Improves code size and potentially performance by replacing ADRP with MOVZ.
- • Adds complexity to handle errata and `--no-relax` flag.
All attributes
- project
- binutils
- subsystem
- aarch64
- patch_id
- —
- discussion_id
- 20260909160555.66067-1-sivan.shani@arm.com
- source_type
- public_inbox
- title
- [PATCH] AArch64: Optimize zero-valued ADRP relocations for undefined weak symbols
- headline
- AArch64: Optimize zero-valued ADRP relocations for undefined weak symbols
- tldr
- Optimizes zero-valued ADRP relocations for undefined weak symbols on AArch64 by rewriting them as MOVZ, also addressing Cortex-A53 erratum 843419.
- proposer
- Sivan Shani <sivan.shani@arm.com>
- consensus
- Proposed
- outcome
- proposed
- sentiment_score
- —
- technical_tradeoffs
-
- • Improves code size and potentially performance by replacing ADRP with MOVZ.
- • Adds complexity to handle errata and `--no-relax` flag.
- series_id
- —
- series_role
- standalone
- series_parts
- []
- tags
-
- • AArch64
- • binutils
- • linker
- • optimization
- • relocations
- bugzilla_url
- —
- date
- 2026-09-09T00:00:00.000Z
[PATCH] AArch64: Optimize zero-valued ADRP relocations for undefined weak symbols
This patch introduces an optimization for AArch64 by rewriting zero-valued ADRP relocations targeting undefined weak symbols as MOVZ instructions. This optimization preserves the destination register and honors the --no-relax flag. Additionally, it addresses a Cortex-A53 erratum 843419 by clearing pending entries when an ADRP is rewritten. The change includes new test cases for LP64 and ILP32 modes.