[PATCH] RISC-V: Describe relax passes with a pass table

Project / Subsystem

binutils / risc-v

Date

2026-09-23

Proposer

Kito Cheng

Source type

public_inbox

Consensus

Proposed

Sentiment

—/10

Technical tradeoffs

  • • Increases code complexity by introducing a new data structure (pass table) but improves maintainability and extensibility.
  • • Allows for vendor-specific extensions without modifying core relaxation logic.

All attributes

project
binutils
subsystem
risc-v
patch_id
—
discussion_id
20260923151722.3185239-1-kito.cheng@sifive.com
source_type
public_inbox
title
[PATCH] RISC-V: Describe relax passes with a pass table
headline
RISC-V: Describe relax passes with a pass table
tldr
Refactors RISC-V relax passes into a table for better extensibility and maintainability.
proposer
Kito Cheng
consensus
Proposed
outcome
proposed
sentiment_score
—
technical_tradeoffs
  • • Increases code complexity by introducing a new data structure (pass table) but improves maintainability and extensibility.
  • • Allows for vendor-specific extensions without modifying core relaxation logic.
series_id
—
series_role
standalone
series_parts
[]
tags
  • • patch
  • • risc-v
  • • binutils
  • • linker
  • • refactoring
bugzilla_url
—
date
2026-09-23T00:00:00.000Z

[PATCH] RISC-V: Describe relax passes with a pass table

This patch refactors the RISC-V relax pass mechanism in binutils to use a pass table instead of hard-coded branches. This change aims to improve extensibility, allowing for easier addition of new relax passes, such as vendor-specific ones or those for Zcmt table jumps. The new structure defines each pass with a reloc selector, optional hooks, and a flag for optimization disabling, while maintaining the existing functionality.