[PATCH v4 6/7] x86: add ACE v1 support for tile move instructions
Project / Subsystem
binutils / x86
Date
2026-09-29
Proposer
Rohan Shenoy <RohanRadhesh.Shenoy@amd.com>
Source type
public_inbox
Consensus
Proposed
Sentiment
—/10
Technical tradeoffs
- • Using VexGd instead of VexGdq with W=1 for the 32-bit register selector ensures correct encoding and disassembly, avoiding potential misinterpretation of register size.
- • The changes involve modifications to multiple disassembler header files and the main C file, indicating a thorough integration effort.
All attributes
- project
- binutils
- subsystem
- x86
- patch_id
- —
- discussion_id
- b117c00537d1b432398465a95a36320ce935989d.1790705096.git.RohanRadhesh.Shenoy@amd.com
- source_type
- public_inbox
- title
- [PATCH v4 6/7] x86: add ACE v1 support for tile move instructions
- headline
- x86: add ACE v1 support for tile move instructions
- tldr
- Adds assembler and disassembler support for ACE v1 tile move instructions (TILEMOVROW, TILEMOVCOL).
- proposer
- Rohan Shenoy <RohanRadhesh.Shenoy@amd.com>
- consensus
- Proposed
- outcome
- proposed
- sentiment_score
- —
- technical_tradeoffs
-
- • Using VexGd instead of VexGdq with W=1 for the 32-bit register selector ensures correct encoding and disassembly, avoiding potential misinterpretation of register size.
- • The changes involve modifications to multiple disassembler header files and the main C file, indicating a thorough integration effort.
- series_id
- binutils:x86: add ace v1 support for tile move instructions
- series_role
- reply
- series_parts
- []
- tags
-
- • x86
- • ace
- • amx
- • assembler
- • disassembler
- bugzilla_url
- —
- date
- 2026-09-29T00:00:00.000Z
[PATCH v4 6/7] x86: add ACE v1 support for tile move instructions
This patch enables assembler and disassembler support for the x86 ACE v1 instructions TILEMOVROW and TILEMOVCOL. It addresses an issue where the register selector is always 32-bit, but using VexGdq with W=1 incorrectly prints a 64-bit register. The fix ensures correct representation by using VexGd instead. The changes are detailed in the AI Compute Extensions (ACE) Specification v1.16.2.