[PATCH v4 2/7] x86: decode EVEX 0F38 4B by length

Project / Subsystem

binutils / x86

Date

2026-09-29

Proposer

Rohan Shenoy <RohanRadhesh.Shenoy@amd.com>

Source type

public_inbox

Consensus

Proposed

Sentiment

—/10

Technical tradeoffs

  • • Improves decoder accuracy for a specific instruction encoding.
  • • Enables support for future instruction sets like ACE.

All attributes

project
binutils
subsystem
x86
patch_id
—
discussion_id
0ed0b87d09a08fe6f3093838df68d04491c42ce4.1790705096.git.RohanRadhesh.Shenoy@amd.com
source_type
public_inbox
title
[PATCH v4 2/7] x86: decode EVEX 0F38 4B by length
headline
x86: decode EVEX 0F38 4B by length
tldr
Modifies the EVEX decoder to correctly handle instructions with non-zero L'L, a prerequisite for ACE instructions.
proposer
Rohan Shenoy <RohanRadhesh.Shenoy@amd.com>
consensus
Proposed
outcome
proposed
sentiment_score
—
technical_tradeoffs
  • • Improves decoder accuracy for a specific instruction encoding.
  • • Enables support for future instruction sets like ACE.
series_id
binutils:x86: decode evex 0f38 4b by length
series_role
reply
series_parts
[]
tags
  • • x86
  • • EVEX
  • • decoder
  • • ACE
bugzilla_url
—
date
2026-09-29T00:00:00.000Z

[PATCH v4 2/7] x86: decode EVEX 0F38 4B by length

This patch adjusts the EVEX decoder in binutils to properly process entries where the L’L field is non-zero. This is a necessary change to ensure that ACE instructions, which may utilize non-zero L’L values, are decoded correctly.