[PATCH v5 0/4] RISC-V: Implement TLS Descriptors.

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Project / Subsystem

binutils / risc-v

Date

2026-10-05

Proposer

Kito Cheng <kito.cheng@sifive.com>

Source type

public_inbox

Consensus

Proposed

Sentiment

—/10

Technical tradeoffs

• Increases complexity in the linker's relaxation and ELF handling code for RISC-V.
• Introduces new internal relocation types and sequences to manage TLSDESC in static contexts.

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All attributes

project: binutils
subsystem: risc-v
patch_id: —
discussion_id: 20261005102157.2614702-1-kito.cheng@sifive.com
source_type: public_inbox
title: [PATCH v5 0/4] RISC-V: Implement TLS Descriptors.
headline: RISC-V: Implement TLS Descriptors.
tldr: Adds support for Thread-Local Storage (TLS) descriptors to the RISC-V toolchain.
proposer: Kito Cheng <kito.cheng@sifive.com>
consensus: Proposed
outcome: proposed
sentiment_score: —
technical_tradeoffs: • Increases complexity in the linker's relaxation and ELF handling code for RISC-V.
• Introduces new internal relocation types and sequences to manage TLSDESC in static contexts.
series_id: binutils:risc-v: implement tls descriptors
series_role: cover
series_parts: []
tags: • risc-v
• tls
• linker
• relaxation
• elf
url: https://inbox.sourceware.org/binutils/20261005102157.2614702-1-kito.cheng@sifive.com
bugzilla_url: —
date: 2026-10-05T00:00:00.000Z

[PATCH v5 0/4] RISC-V: Implement TLS Descriptors.

This series of patches, the fifth version from Tatsuyuki Ishi, introduces and refines support for Thread-Local Storage (TLS) descriptors in the RISC-V binutils. Key changes include enabling TLSDESC for static executables by implementing relaxation and in-place rewriting strategies, unifying TLS handling logic, and improving the integration of symbol information during relaxation. These updates aim to provide robust and correct TLS support for RISC-V binaries, particularly in scenarios previously unsupported by the toolchain.