[PATCH] RISC-V: Update the unlabeled landing pad PLT to the latest psABI
Project / Subsystem
binutils / risc-v
Date
2026-10-05
Proposer
Kito Cheng <kito.cheng@sifive.com>
Source type
public_inbox
Consensus
Proposed
Sentiment
—/10
Technical tradeoffs
- • Minor code size reduction in PLT header.
- • Alignment with evolving psABI standards.
All attributes
- project
- binutils
- subsystem
- risc-v
- patch_id
- —
- discussion_id
- 20261005104458.2633975-1-kito.cheng@sifive.com
- source_type
- public_inbox
- title
- [PATCH] RISC-V: Update the unlabeled landing pad PLT to the latest psABI
- headline
- RISC-V: Update the unlabeled landing pad PLT to the latest psABI
- tldr
- Update the RISC-V assembler's PLT generation to match the latest psABI for improved compatibility and efficiency.
- proposer
- Kito Cheng <kito.cheng@sifive.com>
- consensus
- Proposed
- outcome
- proposed
- sentiment_score
- —
- technical_tradeoffs
-
- • Minor code size reduction in PLT header.
- • Alignment with evolving psABI standards.
- series_id
- —
- series_role
- standalone
- series_parts
- []
- tags
-
- • risc-v
- • binutils
- • assembler
- • plt
- • abi
- bugzilla_url
- —
- date
- 2026-10-05T00:00:00.000Z
[PATCH] RISC-V: Update the unlabeled landing pad PLT to the latest psABI
This patch updates the RISC-V assembler’s handling of the unlabeled landing pad PLT to align with the latest Processor Specification ABI (psABI). The changes involve using register t2 instead of t3 in PLT entries and swapping t2 and t3 in the PLT header. Additionally, the PLT header no longer starts with a landing pad and its size is reduced by removing trailing nops, bringing it to 32 bytes. These modifications are backward compatible as the linker generates the PLT.