Landing: f1fb9dec32d5
Project / Subsystem
gcc / gcc/aarch64
Date
2026-01-14
Author
Artemiy Volkov
Commit
f1fb9dec32d5194b54ac05f7a5423213deabee81
Source
github
Perf win
No
Breaking
No
All attributes
- project
- gcc
- subsystem
- gcc/aarch64
- patch_id
- —
- commit_hash
- f1fb9dec32d5194b54ac05f7a5423213deabee81
- source_type
- github
- headline
- AArch64: Add zeroing forms for predicated SVE FP-to-integer conversions
- tldr
- The compiler now supports zeroing predication for SVE FP-to-integer conversion instructions under SVE2.2 or SME2.2.
- author
- Artemiy Volkov
- outcome
- committed
- performance_win
- false
- breaking_change
- false
- series_id
- —
- series_parts
- []
- tags
-
- • aarch64
- • sve
- • sme
- • intrinsics
- discussion_id_link
- —
- bugzilla_pr
- —
- date
- 2026-01-14T00:00:00.000Z
The compiler now supports zeroing predication for SVE FP-to-integer conversion instructions under SVE2.2 or SME2.2. A new alternative is added to patterns involving the SVE_COND_FCVTI iterator and accepting an independent value as the merge operand. The new alternative has the new zeroing-predication forms as the output string and is only enabled when sve2p2_or_sme2p2 is true in the target architecture.