Landing: 5de59c6d8267

Project / Subsystem

gcc / gcc

Date

2026-04-26

Author

Jeff Law

Commit

5de59c6d8267ddfefec34317a67fa96b4f0900e2

Source

github

Perf win

Yes

Breaking

No

All attributes

project
gcc
subsystem
gcc
patch_id
commit_hash
5de59c6d8267ddfefec34317a67fa96b4f0900e2
source_type
github
headline
Improve equality comparisons of a logical AND expressions
tldr
GCC on RISC-V now optimizes equality comparisons of logical AND results, potentially reducing code size and improving instruction scheduling.
author
Jeff Law
outcome
committed
performance_win
true
breaking_change
false
series_id
series_parts
[]
tags
  • risc-v
  • optimization
  • code generation
  • instruction scheduling
discussion_id_link
bugzilla_pr
date
2026-04-26T00:00:00.000Z

GCC’s RISC-V backend now optimizes equality comparisons where the result of a logical AND operation is compared against zero. By right-shifting trailing zeros from constant, GCC can generate more efficient code sequences. This optimization reduces data dependencies and instruction count, especially when one operand of the AND requires synthesis, leading to performance gains and code density improvements.