Landing: 022afdcb9b71
Project / Subsystem
gcc / gcc
Date
2026-05-01
Author
Jeff Law
Commit
022afdcb9b71f776b825e3d7d148cd73e33b720f
Source
github
Perf win
Yes
Breaking
No
All attributes
- project
- gcc
- subsystem
- gcc
- patch_id
- —
- commit_hash
- 022afdcb9b71f776b825e3d7d148cd73e33b720f
- source_type
- github
- headline
- Improve RISC-V Constant Synthesis for Some HImode Constants
- tldr
- The RISC-V backend now synthesizes HImode constants more efficiently, using `addi` instead of `li+xori` sequences in some cases, and allows CSE to derive const…
- author
- Jeff Law
- outcome
- committed
- performance_win
- true
- breaking_change
- false
- series_id
- —
- series_parts
- []
- tags
-
- • risc-v
- • optimization
- • code generation
- • cse
- discussion_id_link
- —
- bugzilla_pr
- —
- date
- 2026-05-01T00:00:00.000Z
This commit improves the RISC-V backend’s handling of HImode (Half-Word Integer mode) constants. It changes the constant synthesis sequence to use addi (add immediate) instead of li+xori (load immediate + exclusive or immediate) instruction sequences in certain cases, resulting in smaller code size. The patch also adjusts the Common Subexpression Elimination (CSE) pass allowing it to derive new constants from existing ones using NOT/NEG operations, preventing a code quality regression.