Landing: fff26a966b9f

Project / Subsystem

gcc / gcc

Date

2026-05-01

Author

Jeff Law

Commit

fff26a966b9f686bbdfb1baaac757bd9352af7fd

Source

github

Perf win

Yes

Breaking

No

All attributes

project
gcc
subsystem
gcc
patch_id
commit_hash
fff26a966b9f686bbdfb1baaac757bd9352af7fd
source_type
github
headline
Improve RISC-V code generation for xor+xor+ior sequences
tldr
Improves RISC-V code generation by transforming `xor+xor+ior` sequences into more efficient `andn+xor` instructions.
author
Jeff Law
outcome
committed
performance_win
true
breaking_change
false
series_id
series_parts
[]
tags
  • risc-v
  • optimization
  • code generation
  • bit manipulation
discussion_id_link
bugzilla_pr
date
2026-05-01T00:00:00.000Z

This commit optimizes the code sequence generated for expressions like (a ^ b) ^ (a | c) on RISC-V. Instead of generating xor, or, xor instructions, the compiler now generates andn, xor when possible, which is more efficient. This optimization can lead to performance improvements for code that uses this type of expression.