Landing: 00f6fb9df07c
Project / Subsystem
gcc / gcc
Date
2026-05-03
Author
Jeff Law
Commit
00f6fb9df07ced56bca49f85d106504f685cc7a4
Source
github
Perf win
No
Breaking
No
All attributes
- project
- gcc
- subsystem
- gcc
- patch_id
- —
- commit_hash
- 00f6fb9df07ced56bca49f85d106504f685cc7a4
- source_type
- github
- headline
- RISC-V: Correct conditional move expansion after operand canonicalization.
- tldr
- The RISC-V port now correctly handles changes to operand modes during conditional move expansion, fixing a bug introduced by recent improvements.
- author
- Jeff Law
- outcome
- committed
- performance_win
- false
- breaking_change
- false
- series_id
- —
- series_parts
- []
- tags
-
- • risc-v
- • code generation
- • bugfix
- discussion_id_link
- —
- bugzilla_pr
- —
- date
- 2026-05-03T00:00:00.000Z
The RISC-V backend now correctly accounts for changes in operand modes that can occur during the canonicalization step of conditional move expansion. The canonicalization process can alter the mode of operands, and the previous code used a stale mode (QI), leading to errors. The fix involves reordering the mode extraction to occur after canonicalization. This resolves PR target/125152.