Landing: ecfbd7d1b928

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Project / Subsystem

gcc / risc-v

Date

2026-05-08

Author

Zhongyao Chen

Commit

ecfbd7d1b92886024ac6e94000425b3cd0bd0194

Source

github

Perf win

Yes

Breaking

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project: gcc
subsystem: risc-v
patch_id: —
commit_hash: ecfbd7d1b92886024ac6e94000425b3cd0bd0194
source_type: github
headline: RISC-V: Remove interleaved vector synthesis optimization [PR125215]
tldr: The "hi/lo" optimization path for interleaved stepped constant vector synthesis in RISC-V has been removed due to performance concerns.
author: Zhongyao Chen
outcome: committed
performance_win: true
breaking_change: false
series_id: —
series_parts: []
tags: • risc-v
• vectorization
• optimization
discussion_id_link: —
bugzilla_pr: —
url: https://github.com/gcc-mirror/gcc/commit/ecfbd7d1b92886024ac6e94000425b3cd0bd0194
date: 2026-05-08T00:00:00.000Z

The commit removes the “hi/lo” optimization in interleaved stepped constant vector synthesis for RISC-V. This optimization was found to be less effective than the fallback merge version, especially after addressing overflow issues. The associated tests have also been removed.