Landing: 3c6318c5ecbc
Project / Subsystem
gcc / rs6000
Date
2026-05-13
Author
Jeevitha
Commit
3c6318c5ecbccbbfa76e90f97c69e6aa74bf7c5d
Source
github
Perf win
Yes
Breaking
No
All attributes
- project
- gcc
- subsystem
- rs6000
- patch_id
- —
- commit_hash
- 3c6318c5ecbccbbfa76e90f97c69e6aa74bf7c5d
- source_type
- github
- headline
- rs6000: Fix [su]mul<mode>3_highpart patterns to use RTL codes.
- tldr
- This commit fixes the `smul` and `umul` highpart patterns on rs6000 to properly generate widened multiply instructions.
- author
- Jeevitha
- outcome
- committed
- performance_win
- true
- breaking_change
- false
- series_id
- —
- series_parts
- []
- tags
-
- • rs6000
- • code generation
- • bugfix
- discussion_id_link
- —
- bugzilla_pr
- —
- date
- 2026-05-13T00:00:00.000Z
This commit corrects the code generation for high-part multiplication on the rs6000 architecture. The previous implementation used incorrect shift-based patterns that did not match the semantics of the vmulhs<wd> and vmulhu<wd> instructions, which perform a widened multiplication and return the high part of the result. This patch replaces the incorrect patterns with the proper smul_highpart and umul_highpart RTL codes, ensuring correct code generation for high-part multiplication using Altivec registers.