Landing: 6a18e85213ee
Project / Subsystem
gcc / risc-v
Date
2026-05-18
Author
Wang Yaduo
Commit
6a18e85213ee6cdeed707651ca191d40d0c57352
Source
github
Perf win
No
Breaking
No
All attributes
- project
- gcc
- subsystem
- risc-v
- patch_id
- —
- commit_hash
- 6a18e85213ee6cdeed707651ca191d40d0c57352
- source_type
- github
- headline
- RISC-V: Add XuanTie C950 (xt-c9501fdvt) CPU support
- tldr
- Adds support for the XuanTie C950 (xt-c9501fdvt) RISC-V CPU in GCC.
- author
- Wang Yaduo
- outcome
- committed
- performance_win
- false
- breaking_change
- false
- series_id
- —
- series_parts
- []
- tags
-
- • risc-v
- • new cpu
- • target
- discussion_id_link
- —
- bugzilla_pr
- —
- date
- 2026-05-18T00:00:00.000Z
This commit adds support for the XuanTie C950 (xt-c9501fdvt) RISC-V CPU to GCC. The C950 is based on the rva23s64 profile and includes additional extensions. The changes include adding the CPU to the list of known RISC-V CPUs, regenerating documentation, and adding a new test case.