Landing: 83ba1c60b09c
Project / Subsystem
gcc / rs6000
Date
2026-05-22
Author
Kishan Parmar
Commit
83ba1c60b09c77520885332d1f2e68f77294f478
Source
github
Perf win
No
Breaking
No
All attributes
- project
- gcc
- subsystem
- rs6000
- patch_id
- —
- commit_hash
- 83ba1c60b09c77520885332d1f2e68f77294f478
- source_type
- github
- headline
- rs6000: Add MPCCORE to TARGET_NO_LWSYNC to avoid illegal instructions.
- tldr
- GCC avoids generating `lwsync` instructions on MPC8xx PowerQUICC cores, which can cause crashes due to hardware limitations.
- author
- Kishan Parmar
- outcome
- committed
- performance_win
- false
- breaking_change
- false
- series_id
- —
- series_parts
- []
- tags
-
- • gcc
- • rs6000
- • powerpc
- • correctness
- discussion_id_link
- —
- bugzilla_pr
- —
- date
- 2026-05-22T00:00:00.000Z
GCC now avoids emitting lwsync instructions for MPC8xx PowerQUICC processors. These older PowerPC cores don’t fully support the lwsync instruction and will fault if the instruction’s reserved bits aren’t zeroed. This change adds PROCESSOR_MPCCORE to the TARGET_NO_LWSYNC macro, which disables the generation of these instructions, preventing crashes on affected hardware. The fix was verified on MPC860 hardware after encountering an illegal instruction crash in libstdc++ atomics.