Landing: 172785c36dae
Project / Subsystem
gcc / avr
Date
2026-05-24
Author
Georg-Johann Lay
Commit
172785c36dae189fdae68900cb455fad9d9659f2
Source
github
Perf win
Yes
Breaking
No
All attributes
- project
- gcc
- subsystem
- avr
- patch_id
- —
- commit_hash
- 172785c36dae189fdae68900cb455fad9d9659f2
- source_type
- github
- headline
- AVR: Use hard-reg constraints for __load_<size> insns.
- tldr
- The AVR backend now uses hard-register constraints for `__load_<size>` instructions, simplifying code generation for flash memory accesses.
- author
- Georg-Johann Lay
- outcome
- committed
- performance_win
- true
- breaking_change
- false
- series_id
- —
- series_parts
- []
- tags
-
- • avr
- • code generation
- • flash memory
- discussion_id_link
- —
- bugzilla_pr
- —
- date
- 2026-05-24T00:00:00.000Z
The AVR backend is updated to use hard-register constraints instead of explicit hard registers for instructions that generate transparent __load_<size> calls. This change simplifies the code generation for flash memory loads of 3-byte and 4-byte integral, floating-point, and fixed-point values on devices without the LPMx instruction. This change clarifies code generation, but may also impact generated code size and performance, depending on the specific code being compiled.