Landing: 84e5bd1e7dbd
Project / Subsystem
gcc / gcc
Date
2026-05-28
Author
Roger Sayle
Commit
84e5bd1e7dbdd106956ed0f5d8ddee7bf7b3be7c
Source
github
Perf win
Yes
Breaking
No
All attributes
- project
- gcc
- subsystem
- gcc
- patch_id
- —
- commit_hash
- 84e5bd1e7dbdd106956ed0f5d8ddee7bf7b3be7c
- source_type
- github
- headline
- x86 SSE: Improve vector increment/decrement on x86
- tldr
- The x86 backend now generates more efficient SSE code for incrementing and decrementing vectors by using subtraction instead of addition where appropriate.
- author
- Roger Sayle
- outcome
- committed
- performance_win
- true
- breaking_change
- false
- series_id
- —
- series_parts
- []
- tags
-
- • gcc
- • x86
- • SSE
- • vectorization
- • optimization
- discussion_id_link
- —
- bugzilla_pr
- —
- date
- 2026-05-28T00:00:00.000Z
The x86 backend now uses subtraction to add one (x + 1) and addition to subtract one (x - 1) from vectors when generating SSE code. This is more efficient because materializing the vector -1 is cheaper than materializing +1 with SSE instructions. This change avoids generating vpabsb instructions in some cases, resulting in shorter code sequences.