Landing: a054b5db3ad2
Project / Subsystem
gcc / risc-v
Date
2026-05-28
Author
Zhongyao Chen
Commit
a054b5db3ad26559cbfe5443ddd5ef88e487c6e0
Source
github
Perf win
Yes
Breaking
No
All attributes
- project
- gcc
- subsystem
- risc-v
- patch_id
- —
- commit_hash
- a054b5db3ad26559cbfe5443ddd5ef88e487c6e0
- source_type
- github
- headline
- RISC-V: Enable LMUL cost scaling for fixed-length vector modes.
- tldr
- The RISC-V vectorizer now applies LMUL cost scaling to fixed-length vector modes, potentially leading to the selection of smaller LMULs.
- author
- Zhongyao Chen
- outcome
- committed
- performance_win
- true
- breaking_change
- false
- series_id
- —
- series_parts
- []
- tags
-
- • risc-v
- • vectorization
- • optimization
- • cost model
- discussion_id_link
- —
- bugzilla_pr
- —
- date
- 2026-05-28T00:00:00.000Z
The RISC-V vectorizer now uses the same LMUL (Lane Multiplier) cost scaling for both fixed-length (VLS) and variable-length (VLA) vector modes. This encourages the vectorizer to pick smaller LMULs in some cases. Testsuite expectations have been updated to reflect these changes, and a test case relying on large LMULs has been modified to disable the vector cost model.