Landing: 4f6979f50c39

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Project / Subsystem

gcc / gcc/avr

Date

2026-05-29

Author

Georg-Johann Lay

Commit

4f6979f50c39860578c8762e0822661bf058fb6a

Source

github

Perf win

Yes

Breaking

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All attributes

project: gcc
subsystem: gcc/avr
patch_id: —
commit_hash: 4f6979f50c39860578c8762e0822661bf058fb6a
source_type: github
headline: AVR: Use hard-reg constraints in FMUL[S[U]] instructions.
tldr: The AVR backend now uses hard register constraints for FMUL instructions, improving code generation.
author: Georg-Johann Lay
outcome: committed
performance_win: true
breaking_change: false
series_id: —
series_parts: []
tags: • avr
• code generation
• register allocation
• embedded
discussion_id_link: —
bugzilla_pr: —
url: https://github.com/gcc-mirror/gcc/commit/4f6979f50c39860578c8762e0822661bf058fb6a
date: 2026-05-29T00:00:00.000Z

The AVR backend now uses hard register constraints for FMUL, FMULS, and FMULSU instructions. This allows the compiler to generate more efficient code by restricting these instructions to specific registers. The change involves converting these instructions from expanders to insn_and_split and adding new integer attributes. This improves code generation for AVR targets when using multiplication instructions.