Landing: 320b40cca27e
Project / Subsystem
gcc / gcc/riscv
Date
2026-06-24
Author
Jiawei
Commit
320b40cca27e8983f3d290de110a3a06774850e5
Source
github
Perf win
No
Breaking
No
All attributes
- project
- gcc
- subsystem
- gcc/riscv
- patch_id
- —
- commit_hash
- 320b40cca27e8983f3d290de110a3a06774850e5
- source_type
- github
- headline
- RISC-V: Add minimal Smcdeleg extension support
- tldr
- GCC compiler now supports the RISC-V Smcdeleg extension.
- author
- Jiawei
- outcome
- committed
- performance_win
- false
- breaking_change
- false
- series_id
- —
- series_parts
- []
- tags
-
- • risc-v
- • compiler
- • extension
- • performance monitoring
- discussion_id_link
- —
- bugzilla_pr
- —
- date
- 2026-06-24T00:00:00.000Z
This commit adds minimal support for the RISC-V Machine-mode counter delegation (Smcdeleg) extension, which depends on the Ssccfg extension. Changes include updates to the extension definition, options, and documentation, along with a new test case.