Landing: 0748d2c83fc0
Project / Subsystem
gcc / risc-v
Date
2026-06-25
Author
Luke Zhuang
Commit
0748d2c83fc0440f101fe01cc3dfc97c8e11c3b2
Source
github
Perf win
No
Breaking
No
All attributes
- project
- gcc
- subsystem
- risc-v
- patch_id
- —
- commit_hash
- 0748d2c83fc0440f101fe01cc3dfc97c8e11c3b2
- source_type
- github
- headline
- RISC-V: Declare TLSDESC clobbers for vector registers and CSRs per psABI
- tldr
- RISC-V TLSDESC resolver now correctly declares clobbered vector registers and CSRs per updated psABI.
- author
- Luke Zhuang
- outcome
- committed
- performance_win
- false
- breaking_change
- false
- series_id
- —
- series_parts
- []
- tags
-
- • risc-v
- • abi
- • tls
- discussion_id_link
- —
- bugzilla_pr
- —
- date
- 2026-06-25T00:00:00.000Z
The RISC-V TLSDESC (Thread-Local Storage Descriptor) mechanism’s clobber list has been updated to align with the latest psABI. This change ensures that when the V extension is enabled, the TLS resolver correctly accounts for clobbered vector registers and control and status registers (CSRs), preventing potential runtime issues.