Landing: 395e3d8131c1
Project / Subsystem
gcc / aarch64
Date
2026-06-28
Author
Kyrylo Tkachov
Commit
395e3d8131c189cd58e8c8061cdc77d1c44e3822
Source
github
Perf win
Yes
Breaking
No
All attributes
- project
- gcc
- subsystem
- aarch64
- patch_id
- —
- commit_hash
- 395e3d8131c189cd58e8c8061cdc77d1c44e3822
- source_type
- github
- headline
- aarch64: Fold merging svextb/svexth/svextw with a ptrue to AND [PR120027]
- tldr
- Optimizes SVE extension instructions with all-true predicates to simple AND operations.
- author
- Kyrylo Tkachov
- outcome
- committed
- performance_win
- true
- breaking_change
- false
- series_id
- —
- series_parts
- []
- tags
-
- • aarch64
- • sve
- • optimization
- • intrinsics
- discussion_id_link
- —
- bugzilla_pr
- —
- date
- 2026-06-28T00:00:00.000Z
This commit optimizes SVE (Scalable Vector Extension) instructions that perform byte, halfword, or word extensions (svextb, svexth, svextw) when used with an all-true predicate (svptrue_b64) in their merging form. Previously, these instructions would generate unnecessary predicated operations. The compiler now folds these specific cases into a single, unpredicated bitwise AND operation, simplifying the generated code and improving performance for unsigned types.