Landing: 40b1a100861b
Project / Subsystem
gcc / aarch64
Date
2026-06-29
Author
Abhishek Kaushik
Commit
40b1a100861b81e07c7a67b1fa0e5c73ab082cf6
Source
github
Perf win
Yes
Breaking
No
All attributes
- project
- gcc
- subsystem
- aarch64
- patch_id
- —
- commit_hash
- 40b1a100861b81e07c7a67b1fa0e5c73ab082cf6
- source_type
- github
- headline
- Use SBFIZ for widening signed pow2 multiplies on AArch64
- tldr
- Optimized widening signed multiplies by a power of two on AArch64 using SBFIZ.
- author
- Abhishek Kaushik
- outcome
- committed
- performance_win
- true
- breaking_change
- false
- series_id
- —
- series_parts
- []
- tags
-
- • aarch64
- • optimization
- • instruction selection
- • power of two
- discussion_id_link
- —
- bugzilla_pr
- —
- date
- 2026-06-29T00:00:00.000Z
GCC now rewrites widening conversions of signed multiplies by a positive power of two on AArch64. Instead of multiplying then sign-extending, the multiplicand is widened first, allowing the operation to be emitted as a single SBFIZ instruction. This optimization is valid because overflow in signed multiplication is undefined behavior.