Landing: a5d79a657e0f
Project / Subsystem
gcc / risc-v
Date
2026-06-30
Author
Pan Li
Commit
a5d79a657e0fb4fb1558fa710ce83c267c40ffda
Source
github
Perf win
No
Breaking
No
All attributes
- project
- gcc
- subsystem
- risc-v
- patch_id
- —
- commit_hash
- a5d79a657e0fb4fb1558fa710ce83c267c40ffda
- source_type
- github
- headline
- RISC-V: Add test cases for unsigned scalar SAT_MUL form 17
- tldr
- Adds test cases for RISC-V's unsigned scalar SAT_MUL instruction form 17.
- author
- Pan Li
- outcome
- committed
- performance_win
- false
- breaking_change
- false
- series_id
- —
- series_parts
- []
- tags
-
- • risc-v
- • compiler
- • testing
- • instruction
- discussion_id_link
- —
- bugzilla_pr
- —
- date
- 2026-06-30T00:00:00.000Z
This commit adds a comprehensive set of test cases for form 17 of the RISC-V unsigned scalar SAT_MUL (saturated multiply) instruction. These tests are designed to ensure the correct implementation and generation of code for this specific instruction form by the compiler.