Landing: 92d99e6484ae

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Project / Subsystem

gcc / risc-v

Date

2026-07-01

Author

Pan Li

Commit

92d99e6484ae3d6eb9aa1591d3b7498572bec58c

Source

github

Perf win

Breaking

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All attributes

project: gcc
subsystem: risc-v
patch_id: —
commit_hash: 92d99e6484ae3d6eb9aa1591d3b7498572bec58c
source_type: github
headline: RISC-V: Add test cases for vsext.vf2 register overlap
tldr: Adds RISC-V test cases for vsext.vf2 instruction's register group overlap.
author: Pan Li
outcome: committed
performance_win: false
breaking_change: false
series_id: —
series_parts: []
tags: • risc-v
• vector extension
• testing
discussion_id_link: —
bugzilla_pr: —
url: https://github.com/gcc-mirror/gcc/commit/92d99e6484ae3d6eb9aa1591d3b7498572bec58c
date: 2026-07-01T00:00:00.000Z

This commit introduces new test cases to the RISC-V test suite for the vsext.vf2 instruction. These tests focus on scenarios involving register group overlap, ensuring correct handling of widening operations within the vector extension.