Landing: 931cc97b0ab4

← All landings

Project / Subsystem

gcc / aarch64

Date

2026-07-03

Author

Alfie Richards

Commit

931cc97b0ab4690a16ab179af039fef814557e16

Source

github

Perf win

Yes

Breaking

View on GitHub →

All attributes

project: gcc
subsystem: aarch64
patch_id: —
commit_hash: 931cc97b0ab4690a16ab179af039fef814557e16
source_type: github
headline: aarch64 adds optimization for ADD (ABS (A), B) intrinsics
tldr: New optimization rule for aarch64 targets ADD (ABS (A), B) SIMD operations, potentially improving performance.
author: Alfie Richards
outcome: committed
performance_win: true
breaking_change: false
series_id: —
series_parts: []
tags: • aarch64
• optimization
• simd
discussion_id_link: —
bugzilla_pr: —
url: https://github.com/gcc-mirror/gcc/commit/931cc97b0ab4690a16ab179af039fef814557e16
date: 2026-07-03T00:00:00.000Z

The aarch64 backend now recognizes and optimizes the specific pattern of ADD (ABS (A), B) within SIMD operations. A new instruction split, aarch64_abs_plus<mode>, has been added to handle this, aiming to improve the performance of code utilizing these intrinsics.