Landing: 217a7679f4e5

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Project / Subsystem

gcc / gcc/target/or1k

Date

2026-07-04

Author

Stafford Horne

Commit

217a7679f4e50028f62f737c5906e3281c700ddc

Source

github

Perf win

Breaking

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All attributes

project: gcc
subsystem: gcc/target/or1k
patch_id: —
commit_hash: 217a7679f4e50028f62f737c5906e3281c700ddc
source_type: github
headline: Fix or1k conditional move generation and SR_F register usage
tldr: or1k: Correctly handles conditional moves and SR_F register use, fixing compiler errors.
author: Stafford Horne
outcome: committed
performance_win: false
breaking_change: false
series_id: —
series_parts: []
tags: • target
• or1k
• optimization
• compiler bug
discussion_id_link: —
bugzilla_pr: —
url: https://github.com/gcc-mirror/gcc/commit/217a7679f4e50028f62f737c5906e3281c700ddc
date: 2026-07-04T00:00:00.000Z

This commit resolves compiler errors on the or1k target related to the SR_F (status register flag) being incorrectly referenced in SImode. It reverts changes that allowed this usage and adjusts the conditional move (cmov) optimization logic to ensure correct code generation, even when TARGET_CMOV is not explicitly enabled. A new test case is added to cover the fix.