Landing: 05c929c143c5
Project / Subsystem
gcc / risc-v
Date
2026-07-08
Author
Jim Lin
Commit
05c929c143c5dea121e78092a1eaad9a422022a9
Source
github
Perf win
No
Breaking
No
All attributes
- project
- gcc
- subsystem
- risc-v
- patch_id
- —
- commit_hash
- 05c929c143c5dea121e78092a1eaad9a422022a9
- source_type
- github
- headline
- RISC-V: Enable TARGET_SFB_ALU for andes-45-series CPUs
- tldr
- Enables short forward branch ALU support for a specific RISC-V CPU series.
- author
- Jim Lin
- outcome
- committed
- performance_win
- false
- breaking_change
- false
- series_id
- —
- series_parts
- []
- tags
-
- • risc-v
- • compiler
- discussion_id_link
- —
- bugzilla_pr
- —
- date
- 2026-07-08T00:00:00.000Z
This commit enables the TARGET_SFB_ALU option for the andes-45-series RISC-V tune. This change aligns the compiler’s scheduling reservations with the existing capabilities of the andes-45-series, ensuring more accurate code generation for this CPU.