Landing: f8eeddb64139
Project / Subsystem
gcc / risc-v
Date
2026-07-13
Author
Craig Blackmore
Commit
f8eeddb64139a05a3ba250350394159e3ecbd285
Source
github
Perf win
No
Breaking
No
All attributes
- project
- gcc
- subsystem
- risc-v
- patch_id
- —
- commit_hash
- f8eeddb64139a05a3ba250350394159e3ecbd285
- source_type
- github
- headline
- Typed test-suite fix for RISC-V assembler
- tldr
- Fixes a typo in a RISC-V test case, allowing the assembly hard register test to run correctly.
- author
- Craig Blackmore
- outcome
- committed
- performance_win
- false
- breaking_change
- false
- series_id
- —
- series_parts
- []
- tags
-
- • risc-v
- • testsuite
- • bugfix
- discussion_id_link
- —
- bugzilla_pr
- —
- date
- 2026-07-13T00:00:00.000Z
A typo in the target selector of the gcc.dg/asm-hard-reg-4.c test file prevented it from being run for the RISC-V architecture. This commit corrects the typo, ensuring the test suite correctly applies this specific assembly hard register test to RISC-V targets.