Landing: 8a1346f379a1
Project / Subsystem
gcc / x86-64
Date
2026-07-13
Author
H.J. Lu
Commit
8a1346f379a15dc8b79e50656dc5d8728336231c
Source
github
Perf win
No
Breaking
No
All attributes
- project
- gcc
- subsystem
- x86-64
- patch_id
- —
- commit_hash
- 8a1346f379a15dc8b79e50656dc5d8728336231c
- source_type
- github
- headline
- x86-64: Add missing SSE and AVX zero-extend patterns
- tldr
- Includes necessary SSE and AVX patterns for zero-extend conversion instructions, fixing PR target/126231.
- author
- H.J. Lu
- outcome
- committed
- performance_win
- false
- breaking_change
- false
- series_id
- —
- series_parts
- []
- tags
-
- • x86-64
- • sse
- • avx
- • optimization
- discussion_id_link
- —
- bugzilla_pr
- —
- date
- 2026-07-13T00:00:00.000Z
GCD has added missing instruction generation patterns for zero-extending conversions using SSE and AVX instructions on x86-64. These new patterns cover various conversion types like cvtsh2si and cvtsd2usi with specific rounding modes. The change also includes new test cases to verify the correctness of these patterns.