Landing: c348f5c5e991

Project / Subsystem

gcc / gcc/risc-v

Date

2026-07-18

Author

Dusan Stojkovic

Commit

c348f5c5e991dd9d4e13d5943485a938cc4342a8

Source

github

Perf win

Yes

Breaking

No

All attributes

project
gcc
subsystem
gcc/risc-v
patch_id
commit_hash
c348f5c5e991dd9d4e13d5943485a938cc4342a8
source_type
github
headline
Optimize bit manipulation for RISC-V, reducing instruction count.
tldr
Improved RISC-V code generation for bit manipulation sequences, reducing instruction count.
author
Dusan Stojkovic
outcome
committed
performance_win
true
breaking_change
false
series_id
series_parts
[]
tags
  • risc-v
  • optimization
  • performance
discussion_id_link
bugzilla_pr
date
2026-07-18T00:00:00.000Z

This commit introduces a new pattern in the RISC-V backend’s match.pd to optimize specific bit manipulation sequences. It targets constructs like (1 << N) & (1 << N) where shifts occur in different types. By collapsing these into a single bit set operation within the wider type, the code generation is significantly improved, reducing an instruction sequence from six to three on rv64gcb.