Landing: b3ef2a69325c

Project / Subsystem

gcc / risc-v

Date

2026-07-18

Author

Jin Ma

Commit

b3ef2a69325c1c5d9a05df8ac48fc256f8862480

Source

github

Perf win

No

Breaking

No

All attributes

project
gcc
subsystem
risc-v
patch_id
—
commit_hash
b3ef2a69325c1c5d9a05df8ac48fc256f8862480
source_type
github
headline
RISC-V: Widen fusion pair bitmask to unsigned HOST_WIDE_INT
tldr
Increases the size of the fusion pair bitmask in RISC-V to support more instruction fusion types in the future.
author
Jin Ma
outcome
committed
performance_win
false
breaking_change
false
series_id
—
series_parts
[]
tags
  • • risc-v
  • • optimization
  • • architecture
discussion_id_link
—
bugzilla_pr
—
date
2026-07-18T00:00:00.000Z

The RISC-V compiler backend now uses a wider bitmask type for instruction fusion pairs. This change accommodates a larger number of potential fusion types, preventing overflow issues as more advanced CPU features are supported, and enabling future extensibility.