Landing: de2e96b06d36

Project / Subsystem

gcc / risc-v

Date

2026-07-27

Author

Pan Li

Commit

de2e96b06d36266bd7d55d37ce3ab5c780f52eb9

Source

github

Perf win

Breaking

All attributes

project: gcc
subsystem: risc-v
patch_id: —
commit_hash: de2e96b06d36266bd7d55d37ce3ab5c780f52eb9
source_type: github
headline: RISC-V: Allow RVV register overlap for vwsub[u].wv
tldr: RISC-V: Allow RVV register overlap for vwsub[u].wv
author: Pan Li
outcome: committed
performance_win: false
breaking_change: false
series_id: —
series_parts: []
tags: []
discussion_id_link: —
bugzilla_pr: —
url: https://github.com/gcc-mirror/gcc/commit/de2e96b06d36266bd7d55d37ce3ab5c780f52eb9
date: 2026-07-27T00:00:00.000Z

Summary unavailable — see source link.