Landing: a6ceb8bca802
Project / Subsystem
gcc / gcc/risc-v
Date
2026-07-31
Author
Pan Li
Commit
a6ceb8bca802db02edddbebfe2dbf589e5710fc5
Source
github
Perf win
No
Breaking
No
All attributes
- project
- gcc
- subsystem
- gcc/risc-v
- patch_id
- —
- commit_hash
- a6ceb8bca802db02edddbebfe2dbf589e5710fc5
- source_type
- github
- headline
- RISC-V: Add test cases for vwadd.vv with register overlap
- tldr
- Adds test cases for RISC-V vwadd.vv instruction to ensure correct handling of register group overlap.
- author
- Pan Li
- outcome
- committed
- performance_win
- false
- breaking_change
- false
- series_id
- —
- series_parts
- []
- tags
-
- • risc-v
- • vector
- • testing
- discussion_id_link
- —
- bugzilla_pr
- —
- date
- 2026-07-31T00:00:00.000Z
This commit introduces a new test case for the RISC-V vwadd.vv instruction, specifically addressing scenarios where register groups overlap. The test ensures proper functionality when the csrr instruction is used without assembly and overlap is enabled. This complements existing tests for register overlap in related vector operations.