Landing: 93d5e1be87ca

Project / Subsystem

gcc / aarch64

Date

2026-08-07

Author

Rohith Kapelli

Commit

93d5e1be87cab45513ac5ee524c773a6368f61d7

Source

github

Perf win

Yes

Breaking

No

All attributes

project
gcc
subsystem
aarch64
patch_id
—
commit_hash
93d5e1be87cab45513ac5ee524c773a6368f61d7
source_type
github
headline
Optimize two-element vector lane copies on AArch64
tldr
Eliminates unnecessary register moves for two-element vector lane copies, fixing a performance regression.
author
Rohith Kapelli
outcome
committed
performance_win
true
breaking_change
false
series_id
—
series_parts
[]
tags
  • • aarch64
  • • vectorization
  • • optimization
  • • arm
discussion_id_link
—
bugzilla_pr
—
date
2026-08-07T00:00:00.000Z

This commit resolves a performance regression on AArch64 where copying lanes in two-element vectors resulted in an extra register move instruction. By adding new patterns that correctly tie the destination register to the appropriate input, the compiler now generates more efficient code, reducing instructions from two to one for these operations.