Landing: 2be327c50de6
Project / Subsystem
gcc / risc-v
Date
2026-08-07
Author
Pan Li
Commit
2be327c50de607ab0d8c1a2295160313c7edf6db
Source
github
Perf win
Yes
Breaking
No
All attributes
- project
- gcc
- subsystem
- risc-v
- patch_id
- —
- commit_hash
- 2be327c50de607ab0d8c1a2295160313c7edf6db
- source_type
- github
- headline
- RISC-V: Allow register overlap for vwmacc[u].vv instructions.
- tldr
- Enables register group overlap for RISC-V vwmacc and vwmaccu vector instructions, improving scheduling flexibility.
- author
- Pan Li
- outcome
- committed
- performance_win
- true
- breaking_change
- false
- series_id
- —
- series_parts
- []
- tags
-
- • risc-v
- • vector
- • optimization
- discussion_id_link
- —
- bugzilla_pr
- —
- date
- 2026-08-07T00:00:00.000Z
This change allows the RISC-V vector instructions vwmacc.vv and vwmaccu.vv to utilize register group overlap. Similar to other vector instructions like vwadd.vv and vwmul.vv, this relaxation in register constraints provides the compiler with more flexibility in scheduling and register allocation, potentially leading to improved performance by enabling more efficient use of the vector register file.