Landing: c5d147d7370f
Project / Subsystem
gcc / risc-v
Date
2026-08-12
Author
Pan Li
Commit
c5d147d7370fb36834c9348c5d3bab229d89fb3e
Source
github
Perf win
No
Breaking
No
All attributes
- project
- gcc
- subsystem
- risc-v
- patch_id
- —
- commit_hash
- c5d147d7370fb36834c9348c5d3bab229d89fb3e
- source_type
- github
- headline
- RISC-V: Add test cases for vector multiply-accumulate instructions.
- tldr
- Adds test cases for vwmacc and vwmaccu vector instructions on RISC-V, covering register overlap and other scenarios.
- author
- Pan Li
- outcome
- committed
- performance_win
- false
- breaking_change
- false
- series_id
- —
- series_parts
- []
- tags
-
- • risc-v
- • vector
- • testing
- discussion_id_link
- —
- bugzilla_pr
- —
- date
- 2026-08-12T00:00:00.000Z
New test cases have been added for the RISC-V vector multiply-accumulate instructions, specifically vwmacc.vv and vwmaccu.vv. These tests cover scenarios including register group overlap, ensuring correct behavior for signed and unsigned operations across various data types and modes. Additionally, specific checks are included for the ‘csrr not asm’ condition when overlap is enabled.