Landing: 004a9da1bde7

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Project / Subsystem

gcc / aarch64

Date

2026-08-14

Author

Shreesh Adiga

Commit

004a9da1bde785a0ff9536a131e1af707ac937bc

Source

github

Perf win

Yes

Breaking

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All attributes

project: gcc
subsystem: aarch64
patch_id: —
commit_hash: 004a9da1bde785a0ff9536a131e1af707ac937bc
source_type: github
headline: aarch64: Allow zero register for CRC32 instructions to avoid moves.
tldr: aarch64 CRC32 instructions now accept the zero register directly, eliminating unnecessary moves for zero constants.
author: Shreesh Adiga
outcome: committed
performance_win: true
breaking_change: false
series_id: —
series_parts: []
tags: • aarch64
• optimization
• instruction selection
discussion_id_link: —
bugzilla_pr: —
url: https://github.com/gcc-mirror/gcc/commit/004a9da1bde785a0ff9536a131e1af707ac937bc
date: 2026-08-14T00:00:00.000Z

The AArch64 backend now permits the use of the zero register (wzr) for CRC32 instructions when an operand is a constant zero. This optimization avoids redundant mov instructions when initializing CRC values or providing zero data, simplifying generated code and potentially improving performance slightly.