Landing: 35d228f67fc7
Project / Subsystem
gcc / risc-v
Date
2026-08-14
Author
Pan Li
Commit
35d228f67fc7d50e91028f9060a4c6167567b56c
Source
github
Perf win
No
Breaking
No
All attributes
- project
- gcc
- subsystem
- risc-v
- patch_id
- —
- commit_hash
- 35d228f67fc7d50e91028f9060a4c6167567b56c
- source_type
- github
- headline
- Add test cases for vwmaccsu.vv reg overlap.
- tldr
- New test cases enhance RISC-V vector testing by focusing on register overlap for vwmaccsu.vv.
- author
- Pan Li
- outcome
- committed
- performance_win
- false
- breaking_change
- false
- series_id
- —
- series_parts
- []
- tags
-
- • risc-v
- • vector
- • testing
- • autovec
- discussion_id_link
- —
- bugzilla_pr
- —
- date
- 2026-08-14T00:00:00.000Z
This commit introduces a comprehensive set of test cases for the RISC-V Vector extension, specifically targeting the vwmaccsu.vv instruction concerning register group overlap. These tests aim to ensure correct behavior when vector registers are reused or overlap during the execution of this instruction, covering various data types and vector lengths.