Landing: fc58b1fc537f

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Project / Subsystem

gcc / vect

Date

2026-08-20

Author

Tamar Christina

Commit

fc58b1fc537f0b8cad5762f70809678d22dd3c80

Source

github

Perf win

No

Breaking

No

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All attributes

project: gcc
subsystem: vect
patch_id: —
commit_hash: fc58b1fc537f0b8cad5762f70809678d22dd3c80
source_type: github
headline: vect: Fix divmod pattern for SVE2
tldr: Corrected a divmod pattern in the vectorizer to properly handle signed and unsigned types with SVE2, resolving test case failures.
author: Tamar Christina
outcome: committed
performance_win: false
breaking_change: false
series_id: —
series_parts: []
tags: • vectorization
• aarch64
• SVE2
• bugfix
discussion_id_link: —
bugzilla_pr: —
url: https://github.com/gcc-mirror/gcc/commit/fc58b1fc537f0b8cad5762f70809678d22dd3c80
date: 2026-08-20T00:00:00.000Z

A bug in the vectorizer’s divmod pattern has been fixed, resolving failures in SVE2 test cases related to ceiling division and modulo operations. The issue stemmed from the add_code_for_floorceilround_divmod function incorrectly passing a shifted quotient instead of the remainder for some operations. Additionally, the pattern incorrectly used the IFN_DIV_POW2 instruction for unsigned types, despite it being defined only for signed types. These issues have been rectified to ensure correct vectorization for both signed and unsigned division/modulo operations.