Landing: b2a197968117
Project / Subsystem
gcc / risc-v
Date
2026-08-22
Author
Luke Zhuang
Commit
b2a19796811717cc8639408b384501a4dc840dc1
Source
github
Perf win
No
Breaking
No
All attributes
- project
- gcc
- subsystem
- risc-v
- patch_id
- —
- commit_hash
- b2a19796811717cc8639408b384501a4dc840dc1
- source_type
- github
- headline
- RISC-V: Improve slliw shifted bitfield split constraints
- tldr
- Refines constraints for RISC-V slliw instruction's bitfield split pattern to ensure correctness.
- author
- Luke Zhuang
- outcome
- committed
- performance_win
- false
- breaking_change
- false
- series_id
- —
- series_parts
- []
- tags
-
- • risc-v
- • instruction selection
- • compiler
- discussion_id_link
- —
- bugzilla_pr
- —
- date
- 2026-08-22T00:00:00.000Z
This commit refines the constraints for the split pattern of the RISC-V slliw instruction when dealing with shifted bitfields. It ensures the pattern only matches bitfields starting at bit 0 and that the upper bits of the operand correctly reflect the sign-extended result of the slliw operation.