Landing: cafeac4496cb
Project / Subsystem
gcc / risc-v
Date
2026-08-23
Author
Pan Li
Commit
cafeac4496cbe047d429540e3ae23bf9eb64bab4
Source
github
Perf win
No
Breaking
No
All attributes
- project
- gcc
- subsystem
- risc-v
- patch_id
- —
- commit_hash
- cafeac4496cbe047d429540e3ae23bf9eb64bab4
- source_type
- github
- headline
- RISC-V: Add more test cases for vwmulsu.vx
- tldr
- Adds new test cases for RISC-V `vwmulsu.vx` instruction, focusing on non-asm checks.
- author
- Pan Li
- outcome
- committed
- performance_win
- false
- breaking_change
- false
- series_id
- —
- series_parts
- []
- tags
-
- • risc-v
- • rvv
- • testing
- discussion_id_link
- —
- bugzilla_pr
- —
- date
- 2026-08-23T00:00:00.000Z
This commit introduces new test cases for the RISC-V vwmulsu.vx instruction. These tests focus on scenarios where the compiler should not perform csrr (Control and Status Register read) operations in the assembly output, particularly when overlap is enabled. This expands test coverage for the vector multiplication instruction.