Landing: 75a1fc8d285d
Project / Subsystem
gcc / risc-v
Date
2026-08-24
Author
Pan Li
Commit
75a1fc8d285db35a559c21b5b51fe765ae9dc034
Source
github
Perf win
No
Breaking
No
All attributes
- project
- gcc
- subsystem
- risc-v
- patch_id
- —
- commit_hash
- 75a1fc8d285db35a559c21b5b51fe765ae9dc034
- source_type
- github
- headline
- RISC-V: Remove expected failures for csrr asm check
- tldr
- Removes xfail for `csrr` assembly checks in RISC-V tests due to recent improvements.
- author
- Pan Li
- outcome
- committed
- performance_win
- false
- breaking_change
- false
- series_id
- —
- series_parts
- []
- tags
-
- • risc-v
- • rvv
- • testing
- discussion_id_link
- —
- bugzilla_pr
- —
- date
- 2026-08-24T00:00:00.000Z
This commit removes expected failures for csrr assembly checks in several RISC-V test cases. The register overlap support for vwmulsu.vx has been improved, which means csrr instructions are no longer expected in the assembly output for these specific tests. This change aligns the tests with the current compiler’s behavior.